CPCI
时间:2011-03-24 阅读:790
一、CPCI简介
Compact PCI(Compact Peripheral Component Interconnect)简称CPCI,中文又称紧凑型PCI,是工业计算机制造者联合会(PCI Industrial Computer Manufacturer's Group,简称PICMG)于1994提出来的一种总线接口标准。是以PCI电气规范为标准的高性能工业用总线。
CPCI的CPU及外设同标准PCI是相同的,并且系统使用与传统PCI系统相同的芯片、防火墙和相关软件。从根本上说,它们是一致的,因此操作系统、驱动和应用程序都感觉不到两者的区别,将一个标准PCI插卡转化成插卡几乎不需重新设计,只要物理上重新分配一下即可。
为了将PCI SIG的PCI总线规范用在工业控制计算机系统,1995年11月PCI工业计算机制造者联合会(PICMIG)颁布了规范1.0版,以后相继推出了PCI-PCI Bridge规范、Computer ephony TDM规范和User-defined I/O pin assignment规范。简言之总线 = PCI总线的电气规范 + 标准针孔连接器(IEC-1076-4-101) + 欧洲卡规范(IEC297/IEEE 1011.1)。
的出现不仅让诸如CPU、硬盘等许多原先基于PC的技术和成熟产品能够延续应用,也由于在接口等地方做了重大改进,使得采用技术的服务器、工控电脑等拥有了高可靠性、高密度的优点。是基于PCI电气规范开发的高性能工业总线,适用于3U和6U高度的电路插板设计。电路插板从前方插入机柜,I/O数据的出口可以是前面板上的接口或者机柜的背板。它的出现解决了多年来电信系统工程师与设备制造商面临的棘手问题,比如传统电信设备总线VME(Versa Module Euro card)与工业标准PCI(Peripheral Component Interconnect)总线不兼容问题。
二、的特点
技术是在PCI技术基础之上经过改造而成,具体有三个方面:
一是继续采用PCI局部总线技术;
二是抛弃IPC传统机械结构,改用经过20年实践检验了的高可靠欧洲卡结构,改善了散热条件、提高了抗振动冲击能力、符合电磁兼容性要求;
三是抛弃IPC的金手指式互连方式,改用2mm密度的针孔连接器,具有气密性、防腐性,进一步提高了可靠性,并增加了负载能力。
所具有可热插拔(Hot Swap)、高开放性、高可靠性、。技术中zui突出、吸引力的特点是热插拔(Hot Swap)。简言之,就是在运行系统没有断电的条件下,拔出或插入功能模板,而不破坏系统的正常工作的一种技术。热插拔一直是电信应用的要求,也为每一个工业自动化系统所渴求。它的实现是:在结构上采用三种不同长度的引脚插针,使得模板插入或拔出时,电源和接地、PCI总线信号、热插拔启动信号按序进行;采用总线隔离装置和电源的软启动;在软件上,操作系统要具有即插即用功能。目前总线热插拔技术正在从基本热切换技术向高可用性方向发展。
标准具有种种优点。它与传统的桌面PCI系统*兼容,在64位/66M总线接口下能提供每秒高达512MB的带宽。它支持用在桌面PC和工作站上的*一样的接口芯片。使用能利用在桌面工作站上开发的整个应用,无需任何改变就能将其移到目标环境,极大地提高了产品推向市场的时间。利用技术使得电信设备OEM能利用与桌面应用系统同样的*技术,同时还具有针对桌面系统设计的大量PCI芯片所带来的规模经济和低成本特性。其产品成本上往往低于同等功能的VME产品,仅略高于通常的工控机IPC(IPC,Industrial Personal Computer)产品。
规范自制定以来,已历经多个版本。的PICMG 3.0所规范的技术架构在一个更加开放、标准的平台上,有利于各类系统集成商、设备供应商提供更加便捷快速的增值服务,为用户提供更高性价比的产品和解决方案。PICMG 3.0标准是一个全新的技术,与PICMG 2.x*不同,特别在速度上与PICMG 2.x相比,PICMG 3.0速度每秒可达2Tb。PICMG 3.0主要将应用在高带宽电信传输上,以适应未来电信的发展,PICMG 2.x则仍是目前的主流,并将在很长时间内主宰的应用。
三、的应用
所具有高开放性、高可靠性、可热插拔(Hot Swap),使该技术除了可以广泛应用在通讯、网络、计算机整和(Computer ephony),也适合实时系统控制(Real Time Machine Control)、产业自动化、实时数据采集(Real-Time Data Acquisition)、军事系统等需要高速运算、智能交通、航空航天、医疗器械、水利等模块化及高可靠度、可长期使用的应用领域。由于拥有较高的带宽,它也适用于一些高速数据通信的应用,包括服务器、路由器、交换机等。
管脚定义
Pin Name Description
Z1 GND Ground
Z2 GND Ground
Z3 GND Ground
Z4 GND Ground
Z5 GND Ground
Z6 GND Ground
Z7 GND Ground
Z8 GND Ground
Z9 GND Ground
Z10 GND Ground
Z11 GND Ground
Z12 KEY Keyed (no pin)
Z13 KEY Keyed (no pin)
Z14 KEY Keyed (no pin)
Z15 GND Ground
Z16 GND Ground
Z17 GND Ground
Z18 GND Ground
Z19 GND Ground
Z20 GND Ground
Z21 GND Ground
Z22 GND Ground
Z23 GND Ground
Z24 GND Ground
Z25 GND Ground
Z26 GND Ground
Z27 GND Ground
Z28 GND Ground
Z29 GND Ground
Z30 GND Ground
Z31 GND Ground
Z32 GND Ground
Z33 GND Ground
Z34 GND Ground
Z35 GND Ground
Z36 GND Ground
Z37 GND Ground
Z38 GND Ground
Z39 GND Ground
Z40 GND Ground
Z41 GND Ground
Z42 GND Ground
Z43 GND Ground
Z44 GND Ground
Z45 GND Ground
Z46 GND Ground
Z47 GND Ground
A1 5V +5 VDC
A2 TCK Test Clock
A3 INTA# Interrupt A
A4 BRSV Bused Reserved (don't use)
A5 BRSV Bused Reserved (don't use)
A6 REQ# Request PCI transfer
A7 AD(30) Address/Data 30
A8 AD(26) Address/Data 26
A9 C/BE(3)# Command: Byte Enable
A10 AD(21) Address/Data 21
A11 AD(18) Address/Data 18
A12 KEY Keyed (no pin)
A13 KEY Keyed (no pin)
A14 KEY Keyed (no pin)
A15 3.3V +3.3 VDC
A16 DEVSEL# Device Select
A17 3.3V +3.3 VDC
A18 SERR# System Error
A19 3.3V +3.3 VDC
A20 AD(12) Address/Data 12
A21 3.3V +3.3 VDC
A22 AD(7) Address/Data 7)
A23 3.3V +3.3 VDC
A24 AD(1) Address/Data 1)
A25 5V +5 VDC
A26 CLK1 Clock ?? MHz
A27 CLK2 Clock ?? MHz
A28 CLK4 Clock ?? MHz
A29 V(I/O) +3.3 VDC or +5 VDC
A30 C/BE(5)# Command: Byte Enable
A31 AD(63) Address/Data 63
A32 AD(59) Address/Data 59
A33 AD(56) Address/Data 56
A34 AD(52) Address/Data 52
A35 AD(49) Address/Data 49
A36 AD(45) Address/Data 45
A37 AD(42) Address/Data 42
A38 AD(38) Address/Data 38
A39 AD(35) Address/Data 35
A40 BRSV Bused Reserved (don't use)
A41 BRSV Bused Reserved (don't use)
A42 BRSV Bused Reserved (don't use)
A43 USR User Defined
A44 USR User Defined
A45 USR User Defined
A46 USR User Defined
A47 USR User Defined
B1 -12V -12 VDC
B2 5V +5 VDC
B3 INTB# Interrupt B
B4 GND Ground
B5 BRSV Bused Reserved (don't use)
B6 GND Ground
B7 AD(29) Address/Data 29
B8 GND Ground
B9 IDSEL Initialization Device Select
B10 GND Ground
B11 AD(17) Address/Data 17
B12 KEY Keyed (no pin)
B13 KEY Keyed (no pin)
B14 KEY Keyed (no pin)
B15 FRAME# Address or Data phase
B16 GND Ground
B17 SDONE Snoop Done
B18 GND Ground
B19 AD(15) Address/Data 15
B20 GND Ground
B21 AD(9) Address/Data 9)
B22 GND Ground
B23 AD(4) Address/Data 4)
B24 5V +5 VDC
B25 REQ64#
B26 GND Ground
B27 CLK3 Clock ?? MHz
B28 GND Ground
B29 BRSV Bused Reserved (don't use)
B30 GND Ground
B31 AD(62) Address/Data 62
B32 GND Ground
B33 AD(55) Address/Data 55
B34 GND Ground
B35 AD(48) Address/Data 48
B36 GND Ground
B37 AD(41) Address/Data 41
B38 GND Ground
B39 AD(34) Address/Data 34
B40 GND Ground
B41 BRSV Bused Reserved (don't use)
B42 GND Ground
B43 USR User Defined
B44 USR User Defined
B45 USR User Defined
B46 USR User Defined
B47 USR User Defined
C1 TRST# Test Logic Reset
C2 TMS Test Mode Select
C3 INTC# Interrupt C
C4 V(I/O) +3.3 VDC or +5 VDC
C5 RST Reset
C6 3.3V +3.3 VDC
C7 AD(28) Address/Data 28
C8 V(I/O) +3.3 VDC or +5 VDC
C9 AD(23) Address/Data 23
C10 3.3V +3.3 VDC
C11 AD(16) Address/Data 16
C12 KEY Keyed (no pin)
C13 KEY Keyed (no pin)
C14 KEY Keyed (no pin)
C15 IRDY# Initiator Ready
C16 V(I/O) +3.3 VDC or +5 VDC
C17 SBO# Snoop Backoff
C18 3.3V +3.3 VDC
C19 AD(14) Address/Data 14
C20 V(I/O) +3.3 VDC or +5 VDC
C21 AD(8) Address/Data 8)
C22 3.3V +3.3 VDC
C23 AD(3) Address/Data 3)
C24 V(I/O) +3.3 VDC or +5 VDC
C25 BRSV Bused Reserved (don't use)
C26 REQ1# Request PCI transfer
C27 SYSEN#
C28 GNT3# Grant
C29 C/BE(7) Command: Byte Enable
C30 V(I/O) +3.3 VDC or +5 VDC
C31 AD(61) Address/Data 61
C32 V(I/O) +3.3 VDC or +5 VDC
C33 AD(54) Address/Data 54
C34 V(I/O) +3.3 VDC or +5 VDC
C35 AD(47) Address/Data 47
C36 V(I/O) +3.3 VDC or +5 VDC
C37 AD(40) Address/Data 40
C38 V(I/O) +3.3 VDC or +5 VDC
C39 AD(33) Address/Data 33
C40 FAL# Power Supply Status FAL (CompactPCI specific)
C41 DEG# Power Supply Status DEG (CompactPCI specific)
C42 PRST# Push Button Reset (CompactPCI specific)
C43 USR User Defined
C44 USR User Defined
C45 USR User Defined
C46 USR User Defined
C47 USR User Defined
D1 +12V +12 VDC
D2 TDO Test Data Output
D3 5V +5 VDC
D4 INTP
D5 GND Ground
D6 CLK
D7 GND Ground
D8 AD(25) Address/Data 25
D9 GND Ground
D10 AD(20) Address/Data 20
D11 GND Ground
D12 KEY Keyed (no pin)
D13 KEY Keyed (no pin)
D14 KEY Keyed (no pin)
D15 GND Ground
D16 STOP# Stop transfer cycle
D17 GND Ground
D18 PAR Parity for AD0-31 & C/BE0-3
D19 GND Ground
D20 AD(11) Address/Data 11
D21 M66EN
D22 AD(6) Address/Data 6)
D23 5V +5 VDC
D24 AD(0) Address/Data 0)
D25 3.3V +3.3 VDC
D26 GNT1# Grant
D27 GNT2# Grant
D28 REQ4# Request PCI transfer
D29 GND Ground
D30 C/BE(4)# Command: Byte Enable
D31 GND Ground
D32 AD(58) Address/Data 58
D33 GND Ground
D34 AD(51) Address/Data 51
D35 GND Ground
D36 AD(44) Address/Data 44
D37 GND Ground
D38 AD(37) Address/Data 37
D39 GND Ground
D40 REQ5# Request PCI transfer
D41 GND Ground
D42 REQ6# Request PCI transfer
D43 USR User Defined
D44 USR User Defined
D45 USR User Defined
D46 USR User Defined
D47 USR User Defined
E1 5V +5 VDC
E2 TDI Test Data Input
E3 INTD# Interrupt D
E4 INTS
E5 GNT# Grant
E6 AD(31) Address/Data 31
E7 AD(27) Address/Data 27
E8 AD(24) Address/Data 24
E9 AD(22) Address/Data 22
E10 AD(19) Address/Data 19
E11 C/BE(2)# Command: Byte Enable
E12 KEY Keyed (no pin)
E13 KEY Keyed (no pin)
E14 KEY Keyed (no pin)
E15 TRDY# Target Ready
E16 LOCK# Lock resource
E17 PERR# Parity Error
E18 C/BE(1)# Command: Byte Enable
E19 AD(13) Address/Data 13
E20 AD(10) Address/Data 10
E21 C/BE(0)# Command: Byte Enable
E22 AD(5) Address/Data 5)
E23 AD(2) Address/Data 2)
E24 ACK64#
E25 5V +5 VDC
E26 REQ2# Request PCI transfer
E27 REQ3# Request PCI transfer
E28 GNT4# Grant
E29 C/BE(6)# Command: Byte Enable
E30 PAR64
E31 AD(60) Address/Data 60
E32 AD(57) Address/Data 57
E33 AD(53) Address/Data 53
E34 AD(50) Address/Data 50
E35 AD(46) Address/Data 46
E36 AD(43) Address/Data 43
E37 AD(39) Address/Data 39
E38 AD(36) Address/Data 36
E39 AD(32) Address/Data 32
E40 GNT5# Grant
E41 BRSV Bused Reserved (don't use)
E42 GNT6# Grant
E43 USR User Defined
E44 USR User Defined
E45 USR User Defined
E46 USR User Defined
E47 USR User Defined
F1 GND Ground
F2 GND Ground
F3 GND Ground
F4 GND Ground
F5 GND Ground
F6 GND Ground
F7 GND Ground
F8 GND Ground
F9 GND Ground
F10 GND Ground
F11 GND Ground
F12 KEY Keyed (no pin)
F13 KEY Keyed (no pin)
F14 KEY Keyed (no pin)
F15 GND Ground
F16 GND Ground
F17 GND Ground
F18 GND Ground
F19 GND Ground
F20 GND Ground
F21 GND Ground
F22 GND Ground
F23 GND Ground
F24 GND Ground
F25 GND Ground
F26 GND Ground
F27 GND Ground
F28 GND Ground
F29 GND Ground
F30 GND Ground
F31 GND Ground
F32 GND Ground
F33 GND Ground
F34 GND Ground
F35 GND Ground
F36 GND Ground
F37 GND Ground
F38 GND Ground
F39 GND Ground
F40 GND Ground
F41 GND Ground
F42 GND Ground
F43 GND Ground
F44 GND Ground
F45 GND Ground
F46 GND Ground
F47 GND Ground